w25 SPI memory chip

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mnf
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w25 SPI memory chip

Post by mnf »

The EraseBlock macro is incorrect:

Compiles to the following C code:

FC_CAL_SPI_Master_Byte_1(FCL_BLOCKING >> 8 ); // This should be block address (MSB) (pageaddress)
FC_CAL_SPI_Master_Byte_1(FCL_BLOCKING); // block address (LSB)
FC_CAL_SPI_Master_Byte_1(0);
FCD_01531_cal_spi1__Master_Disable_CS();
if (FCL_PAGEADDRESS) // Should be if(FCL_BLOCKING)
{
// .status = 0x01
FCL_STATUS = 0x01;
while (FCL_STATUS & 0x01)
{
FCL_STATUS = FCD_098c1_FlashW25__ReadStatus(0);
}
}
}
- the value of blocking (bool) is used as the address and pageaddress used to determine whether to wait for completion.

Martin

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Re: w25 SPI memory chip

Post by Benj »

Hi Martin,

Thanks great spot there, should be fixed for you now.

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