Possible inconsistency in DECISION handling?
Posted: Wed Sep 12, 2007 5:54 pm
Here's the scenario:
I have a byte variable, 'my_variable', which may have a particular bit set. If I have a DECISION block which contains the following statement:
IF... my_variable AND 1 = 0
the simulator does the predictable thing, and performs a bitwise AND. If the appropriate bit (least significant in this example) is clear, then the conditional branch is taken. But downloading this to the hardware fails (the condition is always false, regardless of the value of my_variable).
However... if I write
IF... (my_variable AND 1) = 0
it works in both simulator and hardware.
I know there are several ways to do 'bit tests', and I also know that using parenthesis makes the statement clearer to 'read'. But... why the inconsistency betwen simulated response and hardware?
I'm planning to use FlowCode to teach my students... and differences between simulator and hardware behaviour will destroy their confidence in the whole process, so I need to know what's going on!
I have a byte variable, 'my_variable', which may have a particular bit set. If I have a DECISION block which contains the following statement:
IF... my_variable AND 1 = 0
the simulator does the predictable thing, and performs a bitwise AND. If the appropriate bit (least significant in this example) is clear, then the conditional branch is taken. But downloading this to the hardware fails (the condition is always false, regardless of the value of my_variable).
However... if I write
IF... (my_variable AND 1) = 0
it works in both simulator and hardware.
I know there are several ways to do 'bit tests', and I also know that using parenthesis makes the statement clearer to 'read'. But... why the inconsistency betwen simulated response and hardware?
I'm planning to use FlowCode to teach my students... and differences between simulator and hardware behaviour will destroy their confidence in the whole process, so I need to know what's going on!